Stand-alone (embedded) or host-based (network streaming) operation
Fully integrated and assembled (the USRP N310 does not support swappable daughtercards)
10 MHz to 6 GHz extended frequency range
Up to 100 MHz of instantaneous bandwidth per channel
4 RX, 4TX in half-wide RU form factor
RX, TX filter bank
16 bit ADC, 14 bit DAC
Configurable sample rates: 122.88, 125, and 153.6 MS/s
Xilinx Zynq-7100 SoC
Dual-core ARM Cortex-A9 800 MHz CPU
Two SFP+ ports (1 Gigabit Ethernet, 10 Gigabit Ethernet, Aurora)
RJ45 (1 GbE) 
PPS time reference
External RX, TX LO input ports 
1 Type A USB host port
1 micro-USB port (serial console, JTAG)
Trusted Platform Module v1.2 
USRP Hardware Driver™ (UHD) open-source software API version 3.11.0 or later
RF Network on Chip (RFNoC™) FPGA development framework
Xilinx Vivado 2017.4 Design Suite (license not included)
GNU Radio support maintained by Ettus Research™ through GR-UHD, an interface to UHD distributed by GNU Radio
Overview: The USRP N310 is a networked software defined radio (SDR) that provides reliability and fault-tolerance for deployment in large-scale and distributed wireless systems. The USRP N310 device simplifies control and management of a network of radios by introducing the unique capability to remotely perform tasks such as updating software, rebooting, factory resetting, self-testing, host PC/ARM debugging and monitoring system health.
The USRP N310 is one of the highest channel density devices in the SDR market, offering four RX and four TX channels in a half-wide RU form factor. The RF front end uses two AD9371 transceivers, the latest RFIC technology from Analog Devices. Each channel provides up to 100 MHz of instantaneous bandwidth, and covers an extended frequency range from 10 MHz to 6 GHz.
The open-source USRP Hardware Driver (UHD) API and RF Network-on-Chip (RFNoC) FPGA development framework reduce software development effort and integrate with a variety of industry-standard tools such as GNU Radio. Users can rapidly prototype and reliably deploy designs for a variety of SDR applications such as wireless testbeds, remote radio heads, spectrum monitoring, and more. Please note that the USRP N310 is not designed for fast tuning. For information on products for frequency hopping applications, contact firstname.lastname@example.org.
The baseband processor uses the Xilinx Zynq-7100 SoC to deliver a large user-programmable FPGA for real-time and low-latency processing and a dual-core ARM CPU for stand-alone operation. Users can deploy applications directly on to the preinstalled embedded Linux operating system or stream samples to a host computer using high-speed interfaces such as 1 Gigabit Ethernet, 10 Gigabit Ethernet, and Aurora over two SFP+ ports.
The USRP N310 has a flexible synchronization architecture with support for clock reference, PPS time reference, external LO input, and GPSDO, which enables implementation of high channel count MIMO systems.
Trusted Platform Module (TPM)
The USRP N310 includes a Trusted Platform Module to enable security features such as file encryption and secure boot. Due to product compliance restrictions on products with TPM (Trusted Platform Module) components to a few countries, the USRP N310 is available in two variants:
Standard variant with TPM (PN 785067-01)
Non-TPM variant (PN 786465-01)
Only the non-TPM variant of the USRP N310 will be available in the People’s Republic of China and Hong Kong. USRP N310 with TPM will not be available in France, Israel or Russia until the N310 is registered in those countries.
Please contact email@example.com if you would like more information.
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